- Digital design in (system)verilog (implementation of module and testbench for verification);
- Experience in Python and/or MATLAB;
- Experience with converting and testing float-point to fixed-point algorithms;
- Verifying the block against reference input/output vectors obtained from the fixed-point system model; Understanding and hands-on experience on digital verification methodologies.
- Understanding of generic signal theory, signal processing, and communications theory.
- Understanding and hands-on experience on RTL implementation of DSP functions like FIR/IIR filters, integrators/accumulators; Viterbi decoder, FFT would be a plus.
- Your communication skills in English are excellent.
- Permanent employment contract, offering you stability and security
- Individual profit sharing: know your market value and share in the profit your work generates
- One-on-one coaching and trainings designed to help you develop your entrepreneurial skills
- The competence cells structure, providing a strong relevant network
- The entrepreneurial lab: a playground for new ideas and a launching for start-ups
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Engine Design Engineer
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Engine Design Engineer
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Alten Nederland Eindhoven, NederlandAs a Mechanical Design Engineer at ALTEN you employ your knowledge of advanced mechanics and design in high-tech machineplatforms. · In this role you complement the team with your knowledge in the field of mechanical design. You work on projects in a multidisciplinary team and y ...
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Digital Design Engineer - Eindhoven, Nederland - TMC Group
Beschrijving
TMC is truly unique thanks to our Employeneurship model. A direct permanent contract, individual profit sharing, support with a one-on-one coach and trainings designed to help you develop your entrepreneurial skills Does this sound interesting to you then check out the vacancy below for one of the ongoing projects at our Key client:
We are building a new Ultra-wideband system that is suitable for communication, ranging and vital sign detection. The system is partitioned into a front-end chip and currently an FPGA. We are looking for support to design the FPGA sub-system. Though the RTL is currently used only in FPGA, it should be suitable for ASIC too. So, the use of FPGA-specific IPs is NOT allowed.
We're looking for an experienced digital designer with affinity to signal processing.
You will be responsible in converting algorithms in a fixed-point model description (Matlab/Python) to RTL. The RTL is usually (system-) verilog. It would be ideal if you are also able to convert a floating-point model description to the fixed-point equivalent advancing to implementing it to RTL.
| WHAT DO WE EXPECT FROM YOU?
We require a candidate with a broad range of skills:
| TMC ELECTRONICS
In the TMC Electronics Business Cell you will find a team of absolute professionals in their fields. All our colleagues are an expert in some areas the world of electronics has to offer. We pride ourselves in finding really interesting and matching challenges for our colleagues and go for maximal satisfaction of our team. We are a warm team, in which new team members feel soon at home, both on a personal and professional level. We look forward to meeting you
| WHAT YOU CAN EXPECT OF TMC:
TMC is a technology and science company that brings expertise to their clients in order to support them with the realization of their technological challenges. As such, TMC is operating as an expert center at the disposition of its clients in order to help them to be more competitive in an ever more global and faster changing technological world.
TMC is truly unique thanks to our business model called the Employeneurship model which comes as a true innovation for the High Technology consulting business. It's the business relationship of the 21th century for high skilled Engineers & Scientists, and our model is built around 5 main pillars:
TMC is an equal opportunity employer and values diversity. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.